Explanation: A storage cell, like any power source, possesses an internal resistance. When current is drawn from the cell, this internal resistance causes a voltage drop within the cell itself, dissipating power as heat internally ($P_{lost} = I^2 \times R_{internal}$). To maximize the power delivered to an external load, these internal losses must be minimized. Therefore, a low internal resistance (A) is highly desirable. It ensures that more of the cell's electromotive force (EMF) is available at its terminals, resulting in a higher terminal voltage under load and thus greater power output to the connected circuit. Conversely, high internal resistance (B) would lead to greater internal voltage drop and power loss, reducing the power available for the load. Low terminal voltage under load (C) is a symptom of high internal resistance, indicating that the cell cannot efficiently deliver power to the circuit.